Team
Principal Investigator: Prof. Young-Ha Hwang (황영하, 黃暎夏)
Professional Experience
Assistant Professor, Soongsil University (Mar. 2022 ~ Present)
Postdoctoral Fellow, Harvard University (Apr. 2020 ~ Feb. 2022)
Postdoctoral Researcher, Seoul National University (Sep. 2019 ~ Feb. 2020)
Education
Ph.D., Electrical and Computer Engineering, Seoul National University
Advisor: Prof. Deog-Kyoon Jeong
B.S. (Summa Cum Laude), Electrical and Computer Engineering, Seoul National University
Sejong Science High School, Seoul
Research Interest
Design of Analog/Mixed-Signal ICs (Analog Front-End, ADC/DAC, LDO, PLL, Transceiver)
Design of CMOS Application-Specific ICs
Graduates
주희철 (Hee-Cheol Joo)
M.S./Ph. D. Candidate (Mar. 2023~)
Education B.S., Soongsil University
Research Topic
Low-dropout regulator (LDO) design
정승채 (Seung Chae Jung)
M.S. Candidate (Sep. 2023~)
Education B.S., Soongsil University
Research Topic
Analog-to-digital converter (ADC) design
이승훈 (Seunghoon Yi)
M.S. Candidate (Sep. 2023~)
Education B.S., Soongsil University
Research Topic
Phase-locked loop (PLL) design
김유창 (Yoochang Kim)
M.S. Candidate (Mar. 2024~)
Education B.S., Soongsil University
Research Topic
High-speed transceiver (TRX) design
오상민 (Sang Min Oh)
M.S. Candidate (Sep. 2024~)
Education B.S., Hanbat National Univ.
Research Topic
Analog-to-digital converter (ADC) design
이현욱 (Hyunwook Lee)
M.S. Candidate (Mar. 2025~)
Education B.S., Soongsil University
Research Topic
Analog/mixed-signal circuit design
김경덕 (Kyungdeok Kim)
M.S. Candidate (Mar. 2025~)
Education B.S., Soongsil University
Research Topic
Neuromorphic circuit design
임재혁 (Jaehyeok Im)
M.S. Candidate (Mar. 2025~)
Education B.S., Soongsil University
Research Topic
Neuromorphic circuit design
함승윤 (Seungyun Ham)
M.S. Candidate (Mar. 2025~)
Education B.S., Soongsil University
Research Topic
Analog-to-digital converter (ADC) design
오지민 (Jimin Oh)
M.S. Candidate (Mar. 2025~)
Education B.S., Soongsil University
Research Topic
Analog-to-digital converter (ADC) design
For prospective members:
We dedicate our resources to fostering our members as IC design experts.
Our research area:
Application/system level: Sensor/display interfaces, quantum computing, high-speed link
Core IP level: Amplifier/LDO, ADC/DAC, PLL/DLL/CDR, high-speed TRX
Key qualifications: Solid understanding of integrated circuits/microelectronics/electrical circuits and basic signal processing
Preferred qualifications:
Experience in using analog/digital/mixed-signal IC design tools
Cadence tools: virtuoso, spectre, etc.
Synopsys tools: hspice, design compiler, ic compiler, etc.
Experience in circuit behavioral modeling and simulation
Based on Verilog-AMS, System Verilog, MATLAB