Team
Principal Investigator: Prof. Young-Ha Hwang (황영하, 黃暎夏)
Professional Experience
Assistant Professor, Soongsil University (Mar. 2022 ~ Present)
Postdoctoral Fellow, Harvard University (Apr. 2020 ~ Feb. 2022)
Postdoctoral Researcher, Inter-university Semiconductor Research Center, Seoul National University (Sep. 2019 ~ Feb. 2020)
Education
Ph.D., Electrical and Computer Engineering, Seoul National University
Advisor: Prof. Deog-Kyoon Jeong
B.S. (Summa Cum Laude), Electrical and Computer Engineering, Seoul National University
Sejong Science High School, Seoul
Research Interest
Sensor ICs: Sensor Readout AFE, Low-power/high-resolution ADC, LDO
High-speed interconnect ICs: Transceiver, PLL/CDR, High-speed ADC
Application-specific ICs: CMOS Circuits for quantum computing, extreme environment
Graduates
주희철 (Hee-Cheol Joo)
M.S./Ph. D. Candidate (Mar. 2023~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Low-dropout regulator (LDO), Amplifier design
Research Achievement & Experience
Publications
Hyunwook Lee (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Seunghoon Yi, and Young-Ha Hwang, "An All-Digital Standard-Cell-Based Resistive-Sensing Display Panel/Chip Crack Detector," 2024 Int. SoC Design Conference
Yoochang Kim, Seunghoon Yi, Seung Chae Jung, Hee-Cheol Joo, Sung-Chul Lee, and Young-Ha Hwang, "A 12.8-Gb/s/lane, 1.03-pJ/b Transmitter With Reconfigurable Charge-Injecting Crosstalk Cancellation For Capacitively Coupled High-Density Interconnects," 2024 Int. SoC Design Conference
Seunghoon Yi (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Yoochang Kim, and Young-Ha Hwang, "PSP model-based emulation method for geometry-dependent cryogenic effects in 28-nm bulk CMOS technology," 2024 Int. Conf. on Electronics, Information, and Communication
Seung Chae Jung (equal), Hee-Cheol Joo (equal), Seunghoon Yi, Yoochang Kim, and Young-Ha Hwang, "Compact characteristic modeling of cryo-CMOS transistor based on commercial process design kit," 2024 Int. Conf. on Electronics, Information, and Communication
Hee-Cheol Joo (equal), Hyein Kim (equal), and Young-Ha Hwang, "A 0.4-VIN, external-capacitor-free, adaptive-biased LDO with look-ahead droop reduction for wake-up features in edge devices," 2023 Int. SoC Design Conference (Anapass Award)
Hee-Cheol Joo and Young-Ha Hwang, "A fully-integrated, transient-enhanced LDO supporting 150-mA load with full-spectrum PSR of -10.2 dB at 0.1-V dropout," 2023 대한전자공학회 하계학술대회
Hee-Cheol Joo, Yeri Kim, and Young-Ha Hwang, "A fully-integrated LDO based on flipped voltage follower and super source follower supporting 200-mA load with enhanced transient response," 2022 대한전자공학회 추계학술대회 (우수논문상)
Awards
2023 Int. SoC Design Conference (ISOCC) Anapass Award
2022 대한전자공학회 추계학술대회 우수논문상
Chip Design Experience
Designed LDO and DDI using 28nm CMOS (24.01 Tape-out)
Designed LDO using 28nm CMOS (23.07 Tape-out)
Patents
황영하, 이현욱, 주희철, "크랙 검출기 및 이를 구비하는 디스플레이 장치," 국내 출원, 2024.07.
Young-Ha Hwang, Hee-Cheol Joo, Yoochang Kim, Seung Chae Jung, Seunghoon Yi, "LDO regulator circuit apparatus capable of attenuating supply voltage noise," US Patent Application, 2024.06.
황영하, 주희철, "저항 소스 디제너레이션을 기반으로 하여 오프셋 전압을 미세하게 조절하는 증폭장치," 국내 출원, 2024.06.
Young-Ha Hwang, Yoochang Kim, Seunghoon Yi, Hee-Cheol Joo, Seung Chae Jung, "High-speed transmitter circuit system for attenuating inter-channel interference," US Patent Application, 2024.06.
황영하, 김유창, 이승훈, 주희철, 정승채, "채널간 간섭을 감쇄하는 고속 송신기 회로 시스템," 국내 출원, 2024.04.
황영하, 주희철, 김유창, 정승채, 이승훈, "공급 전압 잡음 제거가 가능한 LDO 레귤레이터 회로 장치," 국내 출원, 2024.02.
황영하, 주희철, 김유창, 정승채, 이승훈, "LDO 레귤레이터, 이의 구동 방법, 및 이를 포함하는 전원 관리 장치," 국내 출원, 2024.02.
황영하, 이승훈, 정승채, 주희철, 김유창, "PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모델링 시스템 및 방법과 PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모사 및 보정 방법," 국내 출원, 2024.02.
정승채 (Seung Chae Jung) Student Representative
M.S. Candidate (Sep. 2023~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Analog-to-digital converter (ADC) design
Research Achievement & Experience
Publications
Hyunwook Lee (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Seunghoon Yi, and Young-Ha Hwang, "An All-Digital Standard-Cell-Based Resistive-Sensing Display Panel/Chip Crack Detector," 2024 Int. SoC Design Conference
Yoochang Kim, Seunghoon Yi, Seung Chae Jung, Hee-Cheol Joo, Sung-Chul Lee, and Young-Ha Hwang, "A 12.8-Gb/s/lane, 1.03-pJ/b Transmitter With Reconfigurable Charge-Injecting Crosstalk Cancellation For Capacitively Coupled High-Density Interconnects," 2024 Int. SoC Design Conference
Seunghoon Yi (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Yoochang Kim, and Young-Ha Hwang, "PSP model-based emulation method for geometry-dependent cryogenic effects in 28-nm bulk CMOS technology," 2024 Int. Conf. on Electronics, Information, and Communication
Seung Chae Jung (equal), Hee-Cheol Joo (equal), Seunghoon Yi, Yoochang Kim, and Young-Ha Hwang, "Compact characteristic modeling of cryo-CMOS transistor based on commercial process design kit," 2024 Int. Conf. on Electronics, Information, and Communication
Chip Design Experience
Designed SAR ADC using 28nm CMOS (24.01 Tape-out)
Patents
Young-Ha Hwang, Hee-Cheol Joo, Yoochang Kim, Seung Chae Jung, Seunghoon Yi, "LDO regulator circuit apparatus capable of attenuating supply voltage noise," US Patent Application, 2024.06.
Young-Ha Hwang, Yoochang Kim, Seunghoon Yi, Hee-Cheol Joo, Seung Chae Jung, "High-speed transmitter circuit system for attenuating inter-channel interference," US Patent Application, 2024.06.
황영하, 김유창, 이승훈, 주희철, 정승채, "채널간 간섭을 감쇄하는 고속 송신기 회로 시스템," 국내 출원, 2024.04.
황영하, 주희철, 김유창, 정승채, 이승훈, "공급 전압 잡음 제거가 가능한 LDO 레귤레이터 회로 장치," 국내 출원, 2024.02.
황영하, 주희철, 김유창, 정승채, 이승훈, "LDO 레귤레이터, 이의 구동 방법, 및 이를 포함하는 전원 관리 장치," 국내 출원, 2024.02.
황영하, 이승훈, 정승채, 주희철, 김유창, "PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모델링 시스템 및 방법과 PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모사 및 보정 방법," 국내 출원, 2024.02.
이승훈 (Seunghoon Yi) Server Administrator
M.S. Candidate (Sep. 2023~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Phase-locked loop (PLL) design
Research Achievement & Experience
Publications
Hyunwook Lee (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Seunghoon Yi, and Young-Ha Hwang, "An All-Digital Standard-Cell-Based Resistive-Sensing Display Panel/Chip Crack Detector," 2024 Int. SoC Design Conference
Yoochang Kim, Seunghoon Yi, Seung Chae Jung, Hee-Cheol Joo, Sung-Chul Lee, and Young-Ha Hwang, "A 12.8-Gb/s/lane, 1.03-pJ/b Transmitter With Reconfigurable Charge-Injecting Crosstalk Cancellation For Capacitively Coupled High-Density Interconnects," 2024 Int. SoC Design Conference
Seunghoon Yi (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Yoochang Kim, and Young-Ha Hwang, "PSP model-based emulation method for geometry-dependent cryogenic effects in 28-nm bulk CMOS technology," 2024 Int. Conf. on Electronics, Information, and Communication
Seung Chae Jung (equal), Hee-Cheol Joo (equal), Seunghoon Yi, Yoochang Kim, and Young-Ha Hwang, "Compact characteristic modeling of cryo-CMOS transistor based on commercial process design kit," 2024 Int. Conf. on Electronics, Information, and Communication
Chip Design Experience
Designed PLL using 28nm CMOS (24.01 Tape-out)
Patents
Young-Ha Hwang, Hee-Cheol Joo, Yoochang Kim, Seung Chae Jung, Seunghoon Yi, "LDO regulator circuit apparatus capable of attenuating supply voltage noise," US Patent Application, 2024.06.
Young-Ha Hwang, Yoochang Kim, Seunghoon Yi, Hee-Cheol Joo, Seung Chae Jung, "High-speed transmitter circuit system for attenuating inter-channel interference," US Patent Application, 2024.06.
황영하, 김유창, 이승훈, 주희철, 정승채, "채널간 간섭을 감쇄하는 고속 송신기 회로 시스템," 국내 출원, 2024.04.
황영하, 주희철, 김유창, 정승채, 이승훈, "공급 전압 잡음 제거가 가능한 LDO 레귤레이터 회로 장치," 국내 출원, 2024.02.
황영하, 주희철, 김유창, 정승채, 이승훈, "LDO 레귤레이터, 이의 구동 방법, 및 이를 포함하는 전원 관리 장치," 국내 출원, 2024.02.
황영하, 이승훈, 정승채, 주희철, 김유창, "PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모델링 시스템 및 방법과 PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모사 및 보정 방법," 국내 출원, 2024.02.
김유창 (Yoochang Kim)
M.S. Candidate (Mar. 2024~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic High-speed transceiver (TRX) design
Research Achievement & Experience
Publications
Yoochang Kim, Seunghoon Yi, Seung Chae Jung, Hee-Cheol Joo, Sung-Chul Lee, and Young-Ha Hwang, "A 12.8-Gb/s/lane, 1.03-pJ/b Transmitter With Reconfigurable Charge-Injecting Crosstalk Cancellation For Capacitively Coupled High-Density Interconnects," 2024 Int. SoC Design Conference
Seunghoon Yi (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Yoochang Kim, and Young-Ha Hwang, "PSP model-based emulation method for geometry-dependent cryogenic effects in 28-nm bulk CMOS technology," 2024 Int. Conf. on Electronics, Information, and Communication
Seung Chae Jung (equal), Hee-Cheol Joo (equal), Seunghoon Yi, Yoochang Kim, and Young-Ha Hwang, "Compact characteristic modeling of cryo-CMOS transistor based on commercial process design kit," 2024 Int. Conf. on Electronics, Information, and Communication
Yoochang Kim, Sungmin Han, and Young-Ha Hwang, "A 12-Gb/s/lane, 0.2-pJ/bit, staggered-quarter-rate transmitter with FFE-based far-end crosstalk cancellation for next-generation HBM interface," 2023 대한전자공학회 하계학술대회
Sungmin Han, Yoochang Kim, and Young-Ha Hwang, "A 10-Gb/s/lane, 0.5-µm-pitch, 1-mm-long silicon channel interface using 28-nm CMOS for active chiplet interposers," 2023 대한전자공학회 하계학술대회
Awards
2023 형남과학상 동상
Chip Design Experience
Designed high-speed transceiver using 28nm CMOS (24.01 Tape-out)
Patents
Young-Ha Hwang, Hee-Cheol Joo, Yoochang Kim, Seung Chae Jung, Seunghoon Yi, "LDO regulator circuit apparatus capable of attenuating supply voltage noise," US Patent Application, 2024.06.
Young-Ha Hwang, Yoochang Kim, Seunghoon Yi, Hee-Cheol Joo, Seung Chae Jung, "High-speed transmitter circuit system for attenuating inter-channel interference," US Patent Application, 2024.06.
황영하, 김유창, 이승훈, 주희철, 정승채, "채널간 간섭을 감쇄하는 고속 송신기 회로 시스템," 국내 출원, 2024.04.
황영하, 주희철, 김유창, 정승채, 이승훈, "공급 전압 잡음 제거가 가능한 LDO 레귤레이터 회로 장치," 국내 출원, 2024.02.
황영하, 주희철, 김유창, 정승채, 이승훈, "LDO 레귤레이터, 이의 구동 방법, 및 이를 포함하는 전원 관리 장치," 국내 출원, 2024.02.
황영하, 이승훈, 정승채, 주희철, 김유창, "PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모델링 시스템 및 방법과 PSP 모델에 기반한 극저온 상태에서 CMOS 트랜지스터의 특성 모사 및 보정 방법," 국내 출원, 2024.02.
오상민 (Sang Min Oh)
M.S. Candidate (Sep. 2024~)
Education B.S., Electronic Engineering, Hanbat National University
Research Topic Analog-to-digital converter (ADC) design
Undergraduates Intern
이현욱 (Hyunwook Lee)
Incoming M.S. Candidate (Mar. 2025~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Analog/mixed-signal circuit design
Research Achievement & Experience
Publications
Hyunwook Lee (equal), Hee-Cheol Joo (equal), Seung Chae Jung, Seunghoon Yi, and Young-Ha Hwang, "An All-Digital Standard-Cell-Based Resistive-Sensing Display Panel/Chip Crack Detector," 2024 Int. SoC Design Conference
Patents
황영하, 이현욱, 주희철, "크랙 검출기 및 이를 구비하는 디스플레이 장치," 국내 출원, 2024.07.
김경덕 (Kyungdeok Kim)
Incoming M.S. Candidate (Mar. 2025~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Neuromorphic circuit design
임재혁 (Jaehyeok Im)
Incoming M.S. Candidate (Mar. 2025~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Neuromorphic circuit design
함승윤 (Seungyun Ham)
Incoming M.S. Candidate (Mar. 2025~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Analog-to-digital converter (ADC) design
오지민 (Jimin Oh)
Incoming M.S. Candidate (Mar. 2025~)
Education B.S., Electronic Engineering, Soongsil University
Research Topic Analog-to-digital converter (ADC) design
For prospective members:
We dedicate our resources to fostering our members as IC design experts.
Our research area:
Application/system level: Sensor/display interfaces, quantum computing, high-speed link
Core IP level: Amplifier/LDO, ADC/DAC, PLL/DLL/CDR, high-speed TRX
Key qualifications: Solid understanding of integrated circuits/microelectronics/electrical circuits and basic signal processing
Preferred qualifications:
Experience in using analog/digital/mixed-signal IC design tools
Cadence tools: virtuoso, spectre, etc.
Synopsys tools: hspice, design compiler, ic compiler, etc.
Experience in circuit behavioral modeling and simulation
Based on Verilog-AMS, System Verilog, MATLAB
Undergraduate Research Intern
현재 선발 예정 없음
PC 및 모니터 제공, 연구과제 기여도에 따른 인건비 지급
국내/국제 학술대회 논문 지도 및 참석 지원 예정
Class of 2023 @ AIDL [Research Intern & 졸업프로젝트]
김유창 (B.S.): AIDL 석사과정
한성민 (B.S.): Ph.D. candidate @ Texas A&M Univ.
문상혁 (B.S.): 삼성전자 시스템 LSI 사업부
이예린 (B.S.): 삼성전자 메모리사업부
송윤영 (B.S.): LG전자 VS사업부